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aes加密算法实现，经过FPGA验证的
- aes加密算法实现，经过FPGA验证的！,aes encryption algorithm, after FPGA validation!
aescore
- 基于FPGA的AES算法实现的VERILOG源代码，对于信息安全专业研究AES算法的硬件实现很有用-FPGA-based AES algorithm implementation VERILOG source code, for the information security professional research of the hardware implementation of AES algorithm is useful
CoreAES128
- Full AES Simulation Code
RIJNDAEL_DE_TOP
- AES解密运算模块，运算速率100Mbps，请大家参考-AES decryption computing module, computing speed 100Mbps, please refer to
khalil2006_true_random_number_generator
- a true random number generator (TRNG) in hardware which is targeted for FPGA-based crypto embedded systems. All crypto protocols require the generation and use of secret values that must be unknown to attackers.Random number generators (RNG) are requ
mini_aes_latest[1].tar
- AES 加解密 代码, 有文档说明，testbench-AES encoding decoding source code in HDL
aes
- 实现了AES在赛灵思器件上的加密程序 我已经调试过完全正确-Xilinx achieved in AES encryption device debugging process I have been absolutely correct
aesencryption
- Aes encryption on Fpga
AES
- This the source code of AES algorithm which is used in network security.-This is the source code of AES algorithm which is used in network security.
systemcaes_latest.tar
- 高级加密标准aes加密算法用fpga实现的Verilog源代码。-Advanced encryption standard aes encryption algorithm using fpga implementation Verilog source code.
aes
- Matlab code to simulation the wireless channel type.This is the most common case called Rayleigh channel.And in the frequency selective channel.
aes_thesis_v1.0
- AES VERILOG CODE 128 192 32DES比較-AES VERILOG CODE 128 192 32DES Comparison
AES_verilog
- AES 128bit数据,128bit密钥加解密的verilog语言实现-AES 128bit data, 128bit key encryption and decryption of the verilog language implementation
aes
- 其程序是用xilinx环境下编写的，风格是Verilog，请大家提意见。-The program is written using xilinx environment, style Verilog, please comments.
AES!
- AES algorithm very good code tested in xilinx ise tool
sbox
- verilog code for s-box generation for AES algorith
aes_pipe_latest.tar
- implementation of AES encryption algorithm in vhdl/verilog
AES
- AES implementation in VHDL@!
Encryption
- AES implementation in VHDL!! Wit LCD controls-AES implementation in VHDL!! Wit LCD controls!!
decryption
- AES decryption in VHDL!! Wit LCD controls